Semiconductor device and display comprising same
US7205640B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Mar 26, 2003 |
| Grant date | Apr 17, 2007 |
| Priority date | — |
| Expiry date | Mar 26, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
Abstract
In an inverse-stagger MOSFET (1), a gate insulating layer (4) made of amorphous aluminum oxide is so formed as to face a channel layer (5) which serves as the semiconductor layer, and which is made of zinc oxide. With this arrangement, a defect level at an interface between the channel layer (5) and the gate insulating layer (4) is reduced, thereby obtaining performance equivalent to that of a semiconductor apparatus in which all the layered films are crystalline. This technique is applicable to a staggered MOSFET and the like, and has high versatility.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.