Semiconductor multi-package module having package stacked over ball grid array package and having wire bond interconnect between stacked packages
US7205647B2 · kind B2 · utility
33Cited by
63References
13Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Aug 2, 2003 |
| Grant date | Apr 17, 2007 |
| Priority date | — |
| Expiry date | Aug 2, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3025
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor multi-package module having a second package stacked over a lower ball grid array first package, each package including a die attached to a substrate, in which the first and second package substrates are interconnected by wire bonding. Also, a method for making a semiconductor multi-package module, by providing a ball grid array first package including a substrate and a die, affixing a second package including a substrate and a die onto an upper surface of the lower package, and forming z-interconnects between the first and lower substrates.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.