Partial address compares stored in translation lookaside buffer
US7206916B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 8, 2004 |
| Grant date | Apr 17, 2007 |
| Priority date | — |
| Expiry date | Jan 19, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2201/885
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method of performing a fast information compare within a processor which includes performing a more significant bit compare when information is loaded into a translation lookaside buffer, storing a result of the more significant bit compare within the translation lookaside buffer as part of an entry containing the information, and using the result of the more significant bit compare in conjunction with results from a compare of less significant bits of the information and less significant bits of compare information to determine whether a match is present. The more significant bit compare compares more significant bits of the information being loaded into the translation lookaside buffer with more significant bits of compare information.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.