Inventor · Fort Collins, CO, US

Michael Estlick

24Patents
1h-index
39Co-inventors
57Inventor score

Filing activity: Mar 8, 2004 → Jun 16, 2023

Most-cited inventions

PatentTitleAreaCited byStatus
US7206916B2 Partial address compares stored in translation lookaside buffer Physics 5 Expired
US9575763B2 Accelerated reversal of speculative state changes and resource recovery Physics 1 Active
US8769247B2 Processor with increased efficiency via early instruction completion Physics 1 Active
US11544065B2 Bit width reconfiguration using a shadow-latch configured register file Physics 1 Active
US11847463B2 Masked multi-lane instruction memory fault handling using fast and slow execution paths Physics 0 Active
US9910638B1 Computer-based square root and division operations Physics 0 Active
US12229563B2 Split register list for renaming Physics 0 Active
US9959122B2 Single cycle instruction pipeline scheduling Physics 0 Active
US11960897B2 Apparatus and methods employing a shared read post register file Physics 0 Active
US11281466B2 Register renaming after a non-pickable scheduler queue Physics 0 Active
US11451241B2 Setting values of portions of registers based on bit values Physics 0 Active
US8819397B2 Processor with increased efficiency via control word prediction Physics 0 Active
US11907070B2 Methods and apparatus for managing register free lists Physics 0 Active
US12299445B2 Register based SIMD lookup table operations Physics 0 Active
US11573801B1 Method and apparatus for executing vector instructions with merging behavior Physics 0 Active
US12333309B2 Differential pipeline delays in a coprocessor Physics 0 Active
US8671288B2 Processor with power control via instruction issuance Emerging Cross-Sectional Technologies 0 Active
US11709681B2 Differential pipeline delays in a coprocessor Physics 0 Active
US12223324B2 Methods and apparatus for providing mask register optimization for vector operations Physics 0 Active
US12204935B2 Thread forward progress and/or quality of service Physics 0 Active
US11567554B2 Clock mesh-based power conservation in a coprocessor based on in-flight instruction characteristics Emerging Cross-Sectional Technologies 0 Active
US11842200B2 Multi-modal gather operation Physics 0 Active
US12118411B2 Distributed scheduler providing execution pipe balance Physics 0 Active
US10776123B2 Faster sparse flush recovery by creating groups that are marked based on an instruction type Physics 0 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.