Nonvolatile memory device and method of manufacturing the same
US7208365B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Aug 16, 2006 |
| Grant date | Apr 24, 2007 |
| Priority date | — |
| Expiry date | Aug 16, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/6893
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
Provided are a nonvolatile memory device and a method of manufacturing the same. The device includes a semiconductor substrate; a source region and a drain region disposed in the semiconductor substrate and a channel region interposed between the source and drain regions; a first tunnel oxide layer disposed on the channel region near the source region; a second tunnel oxide layer disposed on the channel region near the drain region; a first charge trapping layer disposed on the first tunnel oxide layer; a second charge trapping layer disposed on the second tunnel oxide layer; a blocking oxide layer covering the first and second charge trapping layers; a charge isolation layer interposed between the first and second charge trapping layers; and a gate electrode disposed on the blocking oxide layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.