Multiple doped channel in a multiple doped gate junction field effect transistor
US7211845B1 · kind B1 · utility
14Cited by
2References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 19, 2005 |
| Grant date | May 1, 2007 |
| Priority date | — |
| Expiry date | Apr 19, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/343
Abstract
A multiple doped channel in a multiple doped gate junction field effect transistor. In accordance with a first embodiment of the present invention, a junction field effect transistor (JFET) circuit structure comprises a vertical channel. The vertical channel comprises multiple doping regions. The vertical channel may comprise a first region for enhancement mode operation and a second region for depletion mode operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.