FeRAM having differential data
US7212428B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 28, 2004 |
| Grant date | May 1, 2007 |
| Priority date | — |
| Expiry date | Aug 11, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/22
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A non-volatile ferroelectric memory device having differential datacomprises a plurality of cell array blocks and a data buffer unit. Each of the plurality of cell array blocks includes cell arrays and sense amplifiers. The cell array has a hierarchical bit line architecture and are divided into top and bottom groups where differential data are stored in a plurality of unit cells corresponding to differential main bit lines of the divided cell arrays. The sense amplifiers are positioned between the divided cell array groups for sensing the differential data. The data buffer unit temporarily stores a read data sensed by the sense amplifier and a write data received through a data I/O port.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.