Method for fabricating a semiconductor memory cell
US7214587B2 · kind B2 · utility
7Cited by
0References
12Claims
0Family size
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Key dates
| Filing date | Mar 9, 2005 |
| Grant date | May 8, 2007 |
| Priority date | — |
| Expiry date | Jul 30, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N70/8825
Abstract
Semiconductor memory cell and also a corresponding fabrication method are described, in which a first or bottom electrode device of the memory element of the semiconductor memory cell according to the invention and the gate electrode device of the underlying field effect transistor as selection transistor of the semiconductor memory cell are formed as the same material region or with a common material region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.