Booster circuit
US7215179B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 26, 2003 |
| Grant date | May 8, 2007 |
| Priority date | — |
| Expiry date | Nov 18, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH02M3/076
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
The present invention relates to a booster circuit of a non-volatile memory requiring a plus or minus high voltage equal to or higher than a power-supply voltage. The present invention can generate a high voltage of approximately 12 V even at a low power-supply voltage equal to or lower than 3 V and generate not only a plus high voltage but also a minus high voltage by the same circuit. Also, by combining a body-controlled type parallel charge pump, which is a booster circuit according to the present invention, with a serial-type charge pump, two types of high voltages can be efficiently generated and a reduction in chip areas can be achieved.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.