Method of fabricating an epitaxial silicon-germanium layer and an integrated semiconductor device comprising an epitaxial arsenic in-situ doped silicon-germanium layer

US7217322B2 · kind B2 · utility

Assignee

• TEXAS INSTRUMENTS INCORPORATED · US

Inventors

• Jeffrey A. Babcock · Neufahrn, DE
• Scott Balster · Dallas, US
• Alfred Haeusler · Freising, DE
• Angelo Pinto · Augusta, IT
• Manfred Schiekofer · Freising, DE
• Philipp Steinmann · Richardson, US
• Badih El-Kareh · Colchester, US

Key dates

• Filing date: Sep 2, 2004
• Grant date: May 15, 2007
• Expiry date: Sep 2, 2024

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L21/02576
• WIPO field: Surface technology, coating
• WIPO sector: Chemistry

Abstract

A method of fabricating an epitaxial silicon-germanium layer for an integrated semiconductor device comprises the step of depositing an arsenic in-situ doped silicon-germanium layer, wherein arsenic and germanium are introduced subsequently into different regions of said silicon-germanium layer during deposition of said silicon-germanium layer. By separating arsenic from germanium any interaction between arsenic and germanium is avoided during deposition thereby allowing fabricating silicon-germanium layers with reproducible doping profiles.