Semiconductor structures and methods for fabricating semiconductor structures comprising high dielectric constant stacked structures
US7217643B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 24, 2005 |
| Grant date | May 15, 2007 |
| Priority date | — |
| Expiry date | Jul 11, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/60
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Semiconductor structures, and methods for fabricating semiconductor structures, comprising high dielectric constant stacked structures are provided. A stacked dielectric structure (16) in accordance with one exemplary embodiment of the present invention has a first amorphous dielectric layer (18) comprising HfXZr1-XO2, where 0≦X≦1. An amorphous interlayer (20) overlies the first amorphous dielectric layer. The interlayer has a net dielectric constant that is approximately no less than the dielectric constant of HfZrO4. A second amorphous dielectric layer (22) overlies the interlayer. The second amorphous dielectric layer comprises HfYZr1-YO2, where 0≦Y≦1. The stacked dielectric structure (16) has a net dielectric constant that is approximately no less than the dielectric constant of HfZrO4.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.