Interconnects forming method and interconnects forming apparatus
US7217653B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 22, 2004 |
| Grant date | May 15, 2007 |
| Priority date | — |
| Expiry date | Mar 3, 2025 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/976
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present invention provides an interconnects-forming method and an interconnects-forming apparatus which can minimize the lowering of processing accuracy in etching, minimize light exposure processing for the formation of interconnect recesses in the production of multi-level interconnects, improve the electromigration resistance of interconnects without impairing the electrical properties of the interconnects, and enhance the reliability of the device. The interconnects-forming method, includes providing interconnect recesses in an insulating film formed in a surface of a substrate; embedding an interconnect material in the interconnect recesses while forming a metal film of the interconnect material on a surface of the insulating film; removing an extra metal material other than the metal material in the interconnect recesses and flattening the substrate surface, thereby forming interconnects; forming a first protective film of a conductive material selectively on exposed surfaces of the interconnects; forming a second protective film on the surface of the substrate having the thus-formed first protective film; forming an interlevel insulating film on the surface of the substr…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.