Patent · US Expired

Reconfiguration port for dynamic reconfiguration

US7218137B2 · kind B2 · utility

73Cited by
10References
31Claims
0Family size

Assignee

Inventors

Key dates

Filing dateApr 30, 2004
Grant dateMay 15, 2007
Priority date
Expiry dateJul 29, 2025

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH03K19/1776
  • WIPO fieldBasic communication processes
  • WIPO sectorElectrical engineering

Abstract

Method and apparatus for dynamic configuration of function block logic of an integrated circuit is described. The integrated circuit includes a reconfiguration port coupled to a controller. The controller is coupled to an array of memory cell. A portion of the array of memory cells is coupled for read/write communication with the controller, and another portion of the array of memory cells is not coupled for read/write communication with the controller. The portion of the array of memory cells is configurable at an operational frequency of the integrated circuit for dynamic reconfiguration of the function block logic of the integrated circuit.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.