Memory array incorporating memory cells arranged in NAND strings

US7221588B2 · kind B2 · utility

Assignee

• SanDisk 3D LLC · US

Inventors

• Luca Fasoli · Campbell, US
• Roy E. Scheuerlein · Cupertino, US
• En-Hsing Chen · Sunnyvale, US
• Sucheta Nallamothu · San Jose, US
• Maitreyee Mahajani · Saratoga, US
• Andrew J. Walker · Mountain View, US

Key dates

• Filing date: Dec 5, 2003
• Grant date: May 22, 2007
• Expiry date: Feb 9, 2024

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D88/00
• WIPO field: Computer technology
• WIPO sector: Electrical engineering

Abstract

An exemplary NAND string memory array includes at least one plane of memory cells, said memory cells comprising thin film modifiable conductance switch devices and which cells are arranged in a plurality of series-connected NAND strings, and NAND strings including a series select device at each end thereof. Another exemplary NAND string memory array includes a group of more than four adjacent NAND strings within the same memory block each associated with a respective global bit line not shared by the other NAND string of the group. Another exemplary NAND string memory array includes NAND strings on identical pitch as their respective global bit lines.