Backwards-compatible memory module
US7221617B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 12, 2005 |
| Grant date | May 22, 2007 |
| Priority date | — |
| Expiry date | Jun 27, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2207/107
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A backwards-compatible memory module is disclosed. According to one aspect, a memory module comprises addressable memory cells organized in organization units having a predetermined number of memory cells, a read/write control device clocked by a first clock signal, a plurality of prefetch registers for initially storing data read from the memory cells wherein the register size corresponds to the predetermined number. In a first operating mode, a switching device clocked by a second clock signal successively couples the prefetch registers to data input/output terminals. The number of data input/output terminals corresponds to the predetermined number. In a second operating mode, the switching device is controlled by at least one address signal and couples at least one of the prefetch registers to the data input/output terminals.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.