Dynamic power control for reducing voltage level of graphics controller component of memory controller based on its degree of idleness
US7222253B2 · kind B2 · utility
20Cited by
11References
25Claims
0Family size
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Key dates
| Filing date | Dec 28, 2004 |
| Grant date | May 22, 2007 |
| Priority date | — |
| Expiry date | Dec 20, 2025 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D30/50
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method includes detecting a trigger condition, and in response to detecting the trigger condition, reducing a voltage applied to a graphics controller component of a memory controller. The reduction in voltage may cause the voltage to be reduced below a voltage level required to maintain context information in the graphics controller component.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.