Patent · US Expired

Method for repairing hardware faults in memory chips

US7222271B2 · kind B2 · utility

13Cited by

12References

15Claims

0Family size

Assignee

Infineon Technologies AG · DE

Inventors

Hermann Ruckerbauer · Radolfzell, DE
Florian Schamberger · Bad Reichenhall, DE

Key dates

Filing date	Apr 26, 2002
Grant date	May 22, 2007
Priority date	—
Expiry date	Jun 5, 2023

Classification

Technology area (CPC G)Physics
CPC primaryG11C29/78
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

Method for repairing hardware faults in memory chips. According to one embodiment, a method is provided for repairing bit errors in memory chips having a multiplicity of memory cells. The method can include detecting bit errors using an error identification algorithm. Further, the method can include determining the addresses of faulty memory cells. The method can also include setting a data bit initiating a repair mode in response to detecting a bit error. In the repair mode, a signal present on a data line to the memory chips can be interpreted as a repair command to perform a repair. In addition, the method can include repairing the bit errors by activating redundant memory cells.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.