Patent · US Expired

Method and circuit arrangement for controlling write access to a semiconductor memory

US7224625B2 · kind B2 · utility

19Cited by

4References

18Claims

0Family size

Assignee

Infineon Technologies AG · DE

Inventors

Stefan Dietrich · Potsdam, DE
Thomas Hein · Hersbruck, DE
Peter Schroegmeier · Birkenfeld, DE
Christian Weis · Scheidegg, DE

Key dates

Filing date	Apr 29, 2005
Grant date	May 29, 2007
Priority date	—
Expiry date	Nov 26, 2025

Classification

Technology area (CPC G)Physics
CPC primaryG11C2207/229
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

The invention relates to a method for controlling write access to a semiconductor memory, particularly a DDR graphics memory, in which a multiplicity of data packets are written to the semiconductor memory per data burst, in which write access is initiated by a write command and the data packets which are to be written to the memory are latched under the control of a cycle of a data strobe write clock control signal, where the data packets are latched by alternately using a respective falling and rising edge of the data strobe write clock control signal, and where the data strobe write clock control signal has a defined state at the start of the write operation. The invention also relates to a circuit arrangement for carrying out the method.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.