ESD protection circuit for radio frequency input/output terminals in an integrated circuit
US7224949B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 31, 2002 |
| Grant date | May 29, 2007 |
| Priority date | — |
| Expiry date | Dec 18, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
Abstract
An integrated circuit comprises an ESD protection circuit including an inductor coupled between an input terminal and a ground terminal at which an RF signal is applied. The inductor is designed so as to provide a sufficient current capability required in typical ESD events. Moreover, the inductance of the inductor is selected to define, in combination with any parasitic capacitance present, a resonance tank with a resonant frequency that is matched to the RF signal. Accordingly, the operating frequency of the integrated circuit is not limited by the ESD protection circuit. In a further embodiment, an output terminal is ESD protected by an inductor that is coupled to an auxiliary voltage serving to bias an output transistor. Moreover, clamping elements, such as diodes, are provided between the auxiliary voltage and the supply voltage and between the auxiliary voltage and ground potential.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.