Method of forming a floating metal structure in an integrated circuit
US7227212B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 23, 2004 |
| Grant date | Jun 5, 2007 |
| Priority date | — |
| Expiry date | Dec 23, 2024 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S257/924
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In one embodiment, a sacrificial layer is deposited over a base layer. The sacrificial layer is used to define a subsequently formed floating metal structure. The floating metal structure may be anchored into the base layer. Once the floating metal structure is formed, the sacrificial layer surrounding the floating metal structure is etched to create a unity-k dielectric region separating the floating metal structure from the base layer. The unity-k dielectric region also separates the floating metal structure from another floating metal structure. In one embodiment, a noble gas fluoride such as xenon difluoride is used to etch a sacrificial layer of polycrystalline silicon.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.