Apparatus for a differential self-biasing CMOS amplifier
US7227411B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jun 17, 2003 |
| Grant date | Jun 5, 2007 |
| Priority date | — |
| Expiry date | Jun 17, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F3/45237
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Aspects of the invention provide a self-biasing differential amplifier. The self-biasing differential amplifier may include a first input stage and a biasing transistor pair coupled to the first input stage. A second input stage may be coupled to the first input stage and the biasing transistor pair. The first input stage of the self-biasing differential amplifier may include a first PMOS transistor coupled to a first NMOS transistor in an inverter arrangement. The second input stage may include a second PMOS transistor coupled to a second NMOS transistor. The biasing transistor pair may include a third PMOS transistor coupled to a third NMOS transistor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.