Phase change random access memory (PRAM) device
US7227776B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 23, 2005 |
| Grant date | Jun 5, 2007 |
| Priority date | — |
| Expiry date | Dec 23, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C13/0004
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A phase change memory device includes a phase change memory cell block having alternating odd-numbered and even-numbered local bit lines, a global bit line, a plurality of first bit line selection circuits, and a plurality of second bit line selection circuits. The plurality of first bit line selection circuits are located at a first side of the phase change memory cell block and selectively connect respective odd-numbered local bit lines to the global bit line. The plurality of second bit line selection circuits are located at second side of the phase change memory cell block (opposite the first side) and selectively connect respective even-numbered local bit lines to the global bit line.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.