Method and apparatus for imbedded pattern recognition using dual alternating pointers
US7227994B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 20, 2003 |
| Grant date | Jun 5, 2007 |
| Priority date | — |
| Expiry date | Sep 12, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06V10/7515
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and apparatus for finding a reference pattern (RP) with K elements imbedded in an input pattern IP with repeating substrings uses dual pointers to point to elements in the RP to compare with input elements sequentially clocked from the IP. The dual pointers are loaded with a pointer address corresponding to the first reference element in the RP and the pointer addresses are either incremented to the next position or are reset back to the address of the first reference element in response to results of comparing the reference element they access to the presently clocked input element and results of comparing their respective pointer addresses.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.