Semiconductor device having a metal conductor in ohmic contact with the gate region on the bottom of each groove
US7230283B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | May 27, 2005 |
| Grant date | Jun 12, 2007 |
| Priority date | — |
| Expiry date | Aug 11, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/8325
Abstract
A silicon carbide semiconductor device such as JFET, SIT and the like is provided for accomplishing a reduction in on-resistance and high-speed switching operations. In the JFET or SIT which turns on/off a current with a depletion layer extending in a channel between a gate region formed along trench grooves, a gate contact layer and a gate electrode, which can be supplied with voltages from the outside, are formed on one surface of a semiconductor substrate or on the bottom of the trench groove. A metal conductor (virtual gate electrode) is formed in ohmic contact with a p++ contact layer of the gate region on the bottom of the trench grooves independently of the gate electrode. The virtual gate electrode is electrically isolated from the gate electrode and an external wire.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.