Channel CODEC processor configurable for multiple wireless communications standards
US7230978B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 28, 2001 |
| Grant date | Jun 12, 2007 |
| Priority date | — |
| Expiry date | Jul 18, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/41
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A reconfigurable channel CODEC (encoder and decoder) processor for a wireless communication system is disclosed. A high degree of user programmability and reconfigurability is provided by the channel CODEC processor. In particular, the reconfigurable channel CODEC processor includes processor cores and algorithm-specific kernels that contain logic circuits tailored for carrying out predetermined but user-configurable decoding and encoding algorithms. The interconnects between the processor cores and the algorithm-specific kernels are also user-configurable. Thus, the same hardware can be reconfigured for many different wireless communication standards.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.