Reconfiguration port for dynamic reconfiguration-system monitor interface
US7233532B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 30, 2004 |
| Grant date | Jun 19, 2007 |
| Priority date | — |
| Expiry date | Nov 6, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/17764
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Method and apparatus for an interface to a system monitor (1600) is described. A controller (102) accessible via a port interface thereof (110) is configured for read/write access to configuration memory cells (1500) and for read access to status registers (1602). The configuration memory cells (1500) are addressable via a first address space, and the status registers (1602) are addressable via a second address space different from the first address space. The port interface (110) is configured to receive a plurality of signals including a data address signal (124) and a data clock signal (121). The data address signal (124) has address information for accessing either the first address space or the second address space.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.