Power LDMOS transistor
US7235845B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 12, 2005 |
| Grant date | Jun 26, 2007 |
| Priority date | — |
| Expiry date | Nov 8, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/663
Abstract
A laterally diffused metal-oxide-semiconductor (LDMOS) transistor device includes a doped substrate having an epitaxial layer thereover having source and drain implant regions and body and lightly doped drain regions formed therein. The channel region and lightly doped drain regions are doped to a depth to abut the top surface of the substrate. In alternative embodiments, a buffer region of the second conductivity type and having dopant concentration greater than or equal to about the channel region is formed over the top surface of the substrate between the top surface of the substrate and the channel region and lightly doped drain region, wherein the channel region and lightly doped drain regions are doped to a depth to abut the buffer region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.