Circuit for and method of generating a frequency aligned clock signal
US7236026B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 29, 2005 |
| Grant date | Jun 26, 2007 |
| Priority date | — |
| Expiry date | Aug 6, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L2207/50
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A circuit for generating a clock signal which is frequency aligned with a reference clock signal is disclosed. The circuit comprises a phase detector coupled to receive the reference clock signal and the generated clock signal. A frequency alignment circuit generates an average frequency alignment signal based upon comparison of the phase of a generated pulse train and the phase of a reference pulse train. Finally, an oscillator control circuit is selectively coupled to receive an output of the phase detector based upon the frequency alignment signal from the frequency alignment circuit. The oscillator control circuit generating an oscillator control signal for controlling the frequency of the generated clock signal. A method of generating a clock signal which is frequency aligned with a reference clock signal is also disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.