Attachment of integrated circuit structures and other substrates to substrates with vias
US7241641B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 19, 2005 |
| Grant date | Jul 10, 2007 |
| Priority date | — |
| Expiry date | Oct 19, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/30107
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Vias (210, 210B) are formed in a surface of a substrate. At least portions of contact pads (139, 350) are located in the vias. Contact pads (150, 340) of an integrated circuit structure are inserted into the vias and attached to the contact pads (139, 350) of the substrate. The vias provide a strong, reliable mechanical and electrical connection. A via may expose not only a contact pad (350) in the substrate but also a surrounding region. Solder (930) wets the contact pad better than the surrounding region, resulting in a stronger solder joint and better electrical conductivity. Alternatively, the contact may include multiple conductive layers (910.1, 910.2), with the top layer (910.2) being more solder wettable than the bottom layer (910.1) and the top layer covering only a portion of the bottom layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.