Method of forming a split programming virtual ground SONOS memory
US7244652B2 · kind B2 · utility
1Cited by
2References
16Claims
0Family size
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Key dates
| Filing date | Sep 6, 2004 |
| Grant date | Jul 17, 2007 |
| Priority date | — |
| Expiry date | Jul 14, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/685
Abstract
A method of forming an SPVG SONOS memory. First, a substrate having a well and a plurality of select gate structures is provided. Then, a plurality of sacrificial spacers are formed alongside each select gate structure, and an implantation process is performed to form a doped region in the well between any two adjacent select gate structures. Afterward, the sacrificial spacers are removed, and a composite dielectric layer is formed on the select gate structures and the substrate. Finally, a plurality of word lines are formed on the composite dielectric layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.