Process for forming tapered trenches in a dielectric material
US7247573B2 · kind B2 · utility
4Cited by
7References
23Claims
0Family size
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Key dates
| Filing date | Dec 20, 2004 |
| Grant date | Jul 24, 2007 |
| Priority date | — |
| Expiry date | Jan 26, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B63/32
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A process for forming a tapered trench in a dielectric material includes the steps of forming a dielectric layer on a semiconductor wafer, and plasma etching the dielectric layer; during the plasma etch, the dielectric layer is chemically and physically etched simultaneously.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.