Structures and methods for making strained MOSFETs
US7247912B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 5, 2004 |
| Grant date | Jul 24, 2007 |
| Priority date | — |
| Expiry date | Apr 29, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/6748
Abstract
A method and device providing a strained Si film with reduced defects is provided, where the strained Si film forms a fin vertically oriented on a surface of a non-conductive substrate. The strained Si film or fin may form a semiconductor channel having relatively small dimensions while also having few defects. The strained Si fin is formed by growing Si on the side of a relaxed SiGe block. A dielectric gate, such as, for example, an oxide, a high “k” material, or a combination of the two, may be formed on a surface of the strained Si film. Additionally, without substantially affecting the stress in the strained Si film, the relaxed SiGe block may be removed to allow a second gate oxide to be formed on the surface previously occupied by the relaxed SiGe block. Accordingly, a semiconductor device having a strained Si fin vertically oriented on a non-conductive substrate may be formed where the strained Si film is oriented such that it may form a channel of small dimensions allowing access to both sides and top in order to from single gate, double gate, or more gate MOSFETs and finFETs with a channel having a reduced number of defects and/or reduced dimensions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.