Self-timed memory device providing adequate charging time for selected heaviest loading row
US7248518B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 12, 2005 |
| Grant date | Jul 24, 2007 |
| Priority date | — |
| Expiry date | Aug 17, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C17/06
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The invention includes an apparatus and method of selecting memory cells within a memory array. The method includes receiving a memory cell address. A column address and a row address are generated from the memory cell address. Row select lines or column select lines are pre-charged. A self-timed charging circuit is initiated to provide an adequate amount of time to charge a selected row, and to initiate elimination of static current flowing to unselected rows after a self-timed delay. The other of the row select lines or the column select lines are then pre-charged. Memory cells are selected based upon the column address and the row address. One of two states of the memory cells can be based upon sensing threshold voltages of sense lines that correspond with the selected memory cells.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.