Methods and systems for maintaining information for locating non-native processor instructions when executing native processor instructions
US7249246B1 · kind B1 · utility
12Cited by
6References
22Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 20, 2003 |
| Grant date | Jul 24, 2007 |
| Priority date | — |
| Expiry date | Oct 31, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/45504
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Methods and systems that allow recovery of the program counter or instruction pointer for a target (non-native) instruction that is translated into a host (native) instruction, and that allow recovery of other information about the translator or the target system state, are described. The program counter or instruction pointer can be recovered, for example, after an exception has been processed or incident to a rollback operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.