Nonvolatile memory with multi-frequency charge pump control
US7251162B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 27, 2005 |
| Grant date | Jul 31, 2007 |
| Priority date | — |
| Expiry date | Apr 27, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/12
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present invention is directed to largely reduce peak current at the time of operation of a boosting circuit provided for an EEPROM. In the erase/write operation, first, a low-frequency clock signal as a selection clock signal is input by a low-frequency clock control signal to a charge pump. After lapse of a certain period (about ⅓ of fall time), a high-frequency clock signal having a frequency higher than that of the low-frequency clock signal is output by a high-frequency clock control signal and is input as the selection clock signal to the charge pump to boost a voltage to a predetermined voltage level. In such a manner, while suppressing the peak of consumption current, the fall time of the boosted voltage can be shortened.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.