Pasted SOI substrate, process for producing the same and semiconductor device
US7253082B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 22, 2003 |
| Grant date | Aug 7, 2007 |
| Priority date | — |
| Expiry date | Oct 22, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76254
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A plurality of recessed portions having different depths is formed in a surface of the active layer wafer or in a bonding surface of the supporting substrate wafer. Those wafers are bonded to each other with an insulation film interposed therebetween. This allows a cavity of higher dimensional precision to be buried therein. A plurality of cavities may be formed simultaneously in a plurality of locations within the plane of the substrate, which allows the thickness of the SOI layer to be set arbitrarily. Accordingly, such a semiconductor device can be fabricated easily in which a MOS type element and a bipolar element are formed on the same chip in a mixed manner.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.