Semiconductor device edge termination structure
US7253477B2 · kind B2 · utility
83Cited by
17References
23Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 15, 2005 |
| Grant date | Aug 7, 2007 |
| Priority date | — |
| Expiry date | Jul 20, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/518
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In one embodiment, an edge termination structure is formed in a semiconductor layer of a first conductivity type. The termination structure includes an isolation trench and a conductive layer in contact with the semiconductor layer. The semiconductor layer is formed over a semiconductor substrate of a second conductivity type. In a further embodiment, the isolation trench includes a plurality of shapes that comprise portions of the semiconductor layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.