Voltage controlled delay line (VCDL) having embedded multiplexer and interpolation functions
US7256636B2 · kind B2 · utility
5Cited by
7References
34Claims
0Family size
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Key dates
| Filing date | Sep 30, 2005 |
| Grant date | Aug 14, 2007 |
| Priority date | — |
| Expiry date | Sep 30, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L7/0816
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A voltage controlled delay line (VCDL). The VCDL includes one or more cells. Each of the one or more cells includes two or more inputs and an output. Each of the one or more cells is configured to provide a delay as well as an interpolation function and a multiplexer function. The VCDL may be used to provide delay in a delay locked loop (DLL).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.