Method and apparatus for performing logic replication in field programmable gate arrays
US7257800B1 · kind B1 · utility
20Cited by
6References
34Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 24, 2004 |
| Grant date | Aug 14, 2007 |
| Priority date | — |
| Expiry date | Jul 7, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/34
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for designing a system on a target device utilizing field programmable gate arrays is disclosed. A design is synthesized for the system. Components in the design are mapped onto resources on the target device. Placement locations are determined for the components on the target device. Components to replicate are identified in response to criticality determined from the placement locations.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.