Process for manufacturing a phase change memory array in Cu-damascene technology and phase change memory array manufactured thereby
US7259040B2 · kind B2 · utility
27Cited by
12References
29Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 29, 2004 |
| Grant date | Aug 21, 2007 |
| Priority date | — |
| Expiry date | Jul 19, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N70/8828
Abstract
A process for manufacturing a phase change memory array, includes the steps of: forming a plurality of PCM cells, arranged in rows and columns; and forming a plurality of resistive bit lines for connecting PCM cells arranged on a same column, each resistive bit lines comprising a respective phase change material portion, covered by a respective barrier portion. After forming the resistive bit lines, electrical connection structures for the resistive bit lines are formed directly in contact with the barrier portions of the resistive bit lines.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.