Method and apparatus for controlling access to memory circuitry
US7260688B1 · kind B1 · utility
35Cited by
9References
28Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 15, 2004 |
| Grant date | Aug 21, 2007 |
| Priority date | — |
| Expiry date | Oct 2, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/28
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Method and apparatus for controlling access to memory circuitry is described. In one example, access to the memory circuitry is controlled among a plurality of bus interfaces of a data processing system. A plurality of ports is respectively coupled to said plurality of bus interfaces. Arbitration logic is configured for communication with the plurality of ports. The arbitration logic arbitrates access to the memory circuitry among the plurality of bus interfaces on a time shared basis.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.