Current differential buffer
US7262641B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Dec 7, 2004 |
| Grant date | Aug 28, 2007 |
| Priority date | — |
| Expiry date | Mar 11, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L25/0272
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
The present technique relates to a method and apparatus for operating a differential buffer. In the differential buffer, a first stage may include a differential pair configured to receive input signals and generate output signals. The first stage may also include adjustment circuitry coupled to the differential pair and configured to adjust an amount of current dissipated by the differential buffer. Further, a second stage may include current pulse circuitry coupled to the differential pair and the adjustment circuitry, wherein the current pulse circuitry is configured to generate a current pulse that is coincident with the switching of the differential pair. Finally, the second stage may also include grounding circuitry coupled to the current pulse circuitry and the differential pair, wherein the grounding circuitry is configured to receive the current pulse to prevent the output signals from switching during a transition of the output signals. As such, the differential buffer provides low or no static current dissipation with improved signal integrity for high-speed operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.