Wafer-level testing of optical and optoelectronic chips
US7262852B1 · kind B1 · utility
15Cited by
8References
17Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 14, 2005 |
| Grant date | Aug 28, 2007 |
| Priority date | — |
| Expiry date | Nov 14, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG02B6/4224
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
This application describes, among others, wafer designs, testing systems and techniques for wafer-level optical testing by coupling probe light from top of the wafer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.