Method for fabricating contacts for integrated circuits, and semiconductor component having such contacts
US7265405B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 9, 2004 |
| Grant date | Sep 4, 2007 |
| Priority date | — |
| Expiry date | Jan 9, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/37
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
One (or more) contacts are produced on one or more active areas of a semiconductor wafer, it being possible for one or more isolated control lines to be arranged on the active areas with which contact is to be made. The control lines may, for example, be gate lines. The semiconductor component is fabricated in the following way: application of a polysilicon layer to the semiconductor wafer, patterning of the polysilicon layer, in order to produce a polysilicon contact above the active area, the polysilicon contact at least partly covering the two control lines, application of a first insulator layer to the semiconductor wafer, with the polysilicon contact being embedded, partial removal of the first insulator layer, so that at least the upper surface of the polysilicon contact is uncovered, and application of a metal layer to the semiconductor wafer in order to make electrical contact with the polysilicon contact.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.