Method to improve current and slew rate ratio of off-chip drivers
US7265585B2 · kind B2 · utility
1Cited by
2References
23Claims
0Family size
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Key dates
| Filing date | Dec 14, 2004 |
| Grant date | Sep 4, 2007 |
| Priority date | — |
| Expiry date | Jun 20, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/00384
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An off-chip driver (OCD) circuit and technique to reduce skew between rising and falling edges of output signals as process conditions vary are provided. Variations in process conditions may result in stronger or weaker relative current drive between NMOS and PMOS transistors. One or more process-dependent compensating current paths may be added to conventional pull-up and/or pull-down current paths to compensate for process variations by supplementing the current drive of transistors used to charge (PMOS) or discharge (NMOS) an output node of and end driver (e.g., inverter) stage of an OCD.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.