MOSFET gate driver with a negative gate bias voltage
US7265603B2 · kind B2 · utility
1Cited by
9References
12Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 23, 2003 |
| Grant date | Sep 4, 2007 |
| Priority date | — |
| Expiry date | Dec 29, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K17/0822
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A circuit for preventing shoot-through in a high side switching transistor coupled in series with a low side switching transistor across a supply voltage, the circuit comprising a voltage reference circuit having an output providing a reference voltage which is negative with respect to the supply voltage provided to the high side switching transistor, the reference voltage being applied to the control electrode of the high side switching transistor when the high side switching transistor is off and the source of the high side switching transistor exceeds the reference voltage and the low side switching transistor is on.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.