Differential amplifier offset voltage minimization independently from common mode voltage adjustment
US7268624B2 · kind B2 · utility
10Cited by
6References
13Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 15, 2005 |
| Grant date | Sep 11, 2007 |
| Priority date | — |
| Expiry date | Jan 18, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2203/45646
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Offset voltages in differential amplifiers are minimized by controlling compensation currents through the load impedances of the amplifiers. The currents are varied while sensing the polarity of the offset voltage. When the polarity changes, the current values are latched to keep the offset voltage at a minimum.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.