PCI-X error correcting code (ECC) pin sharing configuration
US7269679B1 · kind B1 · utility
3Cited by
4References
15Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 14, 2005 |
| Grant date | Sep 11, 2007 |
| Priority date | — |
| Expiry date | Jan 25, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/385
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method is provided for utilizing four error correcting code (ECC) pin connections of a PCI/PCI-X bus for one of Grant (GNT) and Request (REQ) pin connections. The method determines a mode of the PCI bus to be PCI-X Mode 1, PCI-X Mode 2, or PCI. If the determined mode is PCI-X Mode 2, the four ECC pin connections are used as ECC pin connections, and if the determined mode is PCI or PCI-X Mode 1, each of the four ECC pin connections is used as a GNT pin connection or a REQ pin connection.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.