Methods and apparatus for indirect compound VLIW execution using operand address mapping techniques
US7272700B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 23, 2003 |
| Grant date | Sep 18, 2007 |
| Priority date | — |
| Expiry date | Dec 2, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3853
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An VLIW instruction mechanism is described which accesses multiple slot instructions for execution to achieve high levels of selectable parallelism and to make improvements to code density. To this end, the VLIW instruction mechanism includes a short instruction word (SIW) register for holding an SIW. The SIW includes an indication of a slot instruction to execute and a dynamic slot instruction operand which is used by the slot instruction to execute. Further, the VLIW instruction mechanism includes a register for holding slot instructions which are retrieved from VLIW memory. The retrieved slot instructions include a stored operand which is used when executing the retrieved slot instruction. The VLIW instruction mechanism further includes a controller and an execution unit. The controller selects which of the operands are utilized with the retrieved slot instructions. The execution unit executes the retrieved slot instruction with the selected operand.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.