Edwin Franklin Barry
52Patents
10h-index
18Co-inventors
75Inventor score
Filing activity: Dec 27, 1996 → May 1, 2019
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US5786805A | Method and apparatus for improving object selection on a computer display by providing cursor control with a sticky property | Physics | 80 | Expired |
| US6356994B1 | Methods and apparatus for instruction addressing in indirect VLIW processors | Physics | 63 | Expired |
| US6446190B1 | Register file indexing methods and apparatus for providing indirect control of register addressing in a VLIW processor | Physics | 40 | Expired |
| US6557094B2 | Methods and apparatus for scalable instruction set architecture with dynamic compact instructions | Physics | 36 | Expired |
| US6851041B2 | Methods and apparatus for dynamic very long instruction word sub-instruction selection for execution time parallelism in an indirect very long instruction word processor | Physics | 26 | Expired |
| US7146487B2 | Methods and apparatus to support conditional execution in a VLIW-based array processor with subword execution | Physics | 25 | Expired |
| US6775766B2 | Methods and apparatus to dynamically reconfigure the instruction pipeline of an indirect very long instruction word scalable processor | Physics | 21 | Expired |
| USRE40883E1 | Methods and apparatus for dynamic instruction controlled reconfigurable register file with extended precision | General | 15 | Expired |
| US6735690B1 | Specifying different type generalized event and action pair in a processor | Physics | 12 | Expired |
| US7809932B1 | Methods and apparatus for adapting pipeline stage latency based on instruction type | Physics | 12 | Expired |
| US7257696B2 | Methods and apparatus for initiating and resynchronizing multi-cycle SIMD instructions | Physics | 10 | Expired |
| US7945760B1 | Methods and apparatus for address translation functions | Physics | 10 | Active |
| US7237088B2 | Methods and apparatus for providing context switching between software tasks with reconfigurable control | Physics | 9 | Expired |
| US6912608B2 | Methods and apparatus for pipelined bus | Physics | 5 | Expired |
| US8489858B2 | Methods and apparatus for scalable array processor interrupt detection and response | Emerging Cross-Sectional Technologies | 4 | Active |
| US7730280B2 | Methods and apparatus for independent processor node operations in a SIMD array processor | Physics | 4 | Active |
| US7266620B1 | System core for transferring data between an external device and memory | Emerging Cross-Sectional Technologies | 4 | Expired |
| US6848041B2 | Methods and apparatus for scalable instruction set architecture with dynamic compact instructions | Physics | 3 | Expired |
| US8156261B2 | Methods and apparatus for providing data transfer control | Physics | 3 | Active |
| USRE41012E1 | Register file indexing methods and apparatus for providing indirect control of register addressing in a VLIW processor | General | 3 | Expired |
| US7765338B2 | Methods and apparatus for providing bit-reversal and multicast functions utilizing DMA controller | Physics | 3 | Active |
| US7506137B2 | Methods and apparatus for initiating and resynchronizing multi-cycle SIMD instructions | Physics | 2 | Active |
| US7272700B1 | Methods and apparatus for indirect compound VLIW execution using operand address mapping techniques | Physics | 2 | Expired |
| US7058790B2 | Cascaded event detection modules for generating combined events interrupt for processor action | Physics | 2 | Expired |
| US9063722B2 | Methods and apparatus for independent processor node operations in a SIMD array processor | Physics | 2 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.